`timescale 1ns / 1ps
/*
 Copyright 2020 Sean Xiao, jxzsxsp@qq.com
 
 Licensed under the Apache License, Version 2.0 (the "License");
 you may not use this file except in compliance with the License.
 You may obtain a copy of the License at
 
 http://www.apache.org/licenses/LICENSE-2.0
 
 Unless required by applicable law or agreed to in writing, software
 distributed under the License is distributed on an "AS IS" BASIS,
 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 See the License for the specific language governing permissions and
 limitations under the License.
 */

module csr_misa
(
   input       [11:0]  i_csr_addr,
   output      [31:0]  o_misa
);

assign o_misa = {
    2'b1 //      32 bit       
   ,4'b0 //      WIRI
   ,1'b0 //      25 Z Reserved
   ,1'b0 //      24 Y Reserved
   ,1'b0 //      23 X Non-standard extensions present
   ,1'b0 //      22 W Reserved
   ,1'b0 //      21 V Tentatively reserved for Vector extension 20 U User mode implemented
   ,1'b0 //      20 U User mode implemented
   ,1'b0 //      19 T Tentatively reserved for Transactional Memory extension
   ,1'b0 //      18 S Supervisor mode implemented
   ,1'b0 //      17 R Reserved
   ,1'b0 //      16 Q Quad-precision floating-point extension
   ,1'b0 //      15 P Tentatively reserved for Packed-SIMD extension
   ,1'b0 //      14 O Reserved
   ,1'b0 //      13 N User-level interrupts supported
   ,1'b0 //      12 M Integer Multiply/Divide extension
   ,1'b0 //      11 L Tentatively reserved for Decimal Floating-Point extension
   ,1'b0 //      10 K Reserved
   ,1'b0 //      9 J Reserved
   ,1'b1 // <=   8 I RV32I/64I/128I base ISA
   ,1'b0 //      7 H Hypervisor mode implemented
   ,1'b0 //      6 G Additional standard extensions present
   ,1'b0 //      5 F Single-precision floating-point extension
   ,1'b0 //      4 E RV32E base ISA          
   ,1'b0 //      3 D Double-precision floating-point extension
   ,1'b0 //      2 C Compressed extension
   ,1'b0 //      1 B Tentatively reserved for Bit operations extension
   ,1'b0 //      0 A Atomic extension
};

endmodule